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55 v, emi enhanced, zero drift, ultralow noise, rail - to - rail output operational amplifier data sheet ada4522 - 2 / ada4522 - 4 rev. b document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result fr om its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one tec hnology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2015 C 2016 analog devices, inc. all rights reserved. technical sup port www.analog.com features low offset voltage: 5 v maximum extremely low offset voltage drift: 22 nv/c maximum low voltage noise density : 5.8 nv/ hz typical 117 nv p - p from 0.1 hz to 10 hz typical low input bias current: 50 pa typical unity - gain c rossover : 3 mhz single - supply operation: input voltage range includes ground and rail - to - rail output w ide range of operating voltages single - supply operation: 4.5 v to 5 5 v dual - supply o peration: 2.25 v to 2 7.5 v integrated emi filters unity - gain stable applications lcr meter/megohmmeter front - end amplifiers load cell and bridge transducers magnetic force balance scales high precision shunt current sensing thermocouple/rtd sensors plc input and output amplifiers pin connection diagr am out a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 ADA4522-2 top view (not to scale) 13168-001 figure 1. 8 - lead msop (rm suffix) and 8 - lead soic (r suffix) pin configuration general description the ada4522 - 2 / ada4522 - 4 are a dual /quad channel , zero drift op amp s w ith low noise and power, ground sensing inputs , and rail - to - rail output, optimized for total accuracy over time, temperature, and voltage conditions. the wide operating voltage and temperature ranges, as well as the high open - loop gain and very low dc and ac errors make the device well suited for amplifying very small input signals and for accurately reproducing larger signals in a wide variety of applications. the ada4522 - 2 / ada4522 - 4 performance is specified at 5.0 v, 30 v, and 55 v power supply voltages and it operates over the range of 4.5 v to 55 v. it is an excellent selection for applications using single - ended supplies of 5 v, 1 0 v, 1 2 v, a n d 3 0 v, or for application s using higher single supplies and dual supplies of 2.5 v, 5 v, a n d 15 v. t h e ada4522 - 2 / ada4522 - 4 use on - chip filtering to achieve high immunity to electromagnetic interference (emi). the ada4522 - 2 / ada4522 - 4 are fully specified over the extended industrial temperature range of ?40c to +125c and are available in 8 - lead msop , 8 - lead soic , 14 - lead soic, and 14- lead tssop packages. for ada4522 - 4 pin connections and for more information about the pin connections for these product, see the pin configuration s and function descriptions section. 100 10 1 0.1 10 100k 1m 10k 1k 100 voltage noise density (nv/hz) frequency (hz) a v = 100 5v 30v 55v 13168-165 figure 2 . voltage nois e density vs. frequency , v sy = 15 v table 1 . zero d rift op amps (< 0.1 v/c) supply voltage 5 v 16 v 30 v 55 v single ada4528 - 1 ad8638 ada4638 - 1 ad8628 ad8538 ada4051 - 1 dual ada4528 - 2 ad8639 ada4522 - 2 ad8629 ad8539 ada4051 - 2 quad ad8630 ada4522 - 4
ada4522- 2/ada4522 - 4 data sheet rev. b | page 2 of 30 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 pin connection diagram ................................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics 5.0 v operation ............................ 3 electrical characteristics 30 v operation ............................. 4 electrical characteristics 55 v operation ............................. 5 absolute maximum ratings ............................................................ 7 thermal resistance ...................................................................... 7 esd caution .................................................................................. 7 pin configurations and function descriptions ........................... 8 typical performance characteristics ............................................. 9 applications information .............................................................. 20 theory of operation .................................................................. 20 on - chip input emi filter and clamp circuit ....................... 20 thermal shutdown .................................................................... 21 input protection ......................................................................... 21 single - supply and rail - to - rail output ................................... 21 large signal transient response .............................................. 22 noise considerations ................................................................. 22 emi rejection ratio .................................................................. 24 capacitive load stability ........................................................... 24 si ngle - supply instrumentation amplifier .............................. 25 load cell/strain gage sensor signal conditioning using the ada4522 - 2 ................................................................................. 26 precision low - side current shunt sensor .............................. 27 printed circuit board layout ................................................... 27 comparator operation .............................................................. 28 outline dimensions ....................................................................... 29 ordering guide .......................................................................... 30 revision history 1 / 16 rev. a to rev. b updated outline dimensions ....................................................... 29 10 /15 rev. 0 to rev. a added ada4522 - 4 ............................................................. universal change s to general description section ...................................... 1 change t o common - mode rejection ratio parameter, table 2 .. 3 change to offset voltage drift parameter, table 3 ...................... 4 change to offset voltage drift parameter and input offset current parameter, table 4 .............................................................. 5 changes to table 6 ............................................................................ 7 added figure 4 and table 8 ; renumbered sequentially ............. 8 changes to figure 34 ...................................................................... 13 changes to figure 67 ...................................................................... 19 change s to applications information section ........................... 20 change s t o thermal shutdown section ...................................... 21 changes to single - supply instrumentation amplifier section ...... 25 changes to precision low - side current shunt sensor section ..... 27 changes to printed circuit board layout section ............................. 28 added figure 89 and figure 90 ; outline dimensions ............... 30 changes to ordering guide .......................................................... 30 5 / 15 revision 0 : initial version
data sheet ada4522- 2/ada4522 - 4 rev. b | page 3 of 30 specifications electrical character istics 5.0 v operation v sy = 5.0 v, v cm = v sy / 2 v, t a = 25c, unless otherwise specified. table 2 . parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os v cm = v sy /2 0.7 5 v ? 40c t a +125c 6.5 v offset voltage drift v os /t 2.5 15 nv/c input bias current i b 50 150 pa ? 40c t a +85c 500 pa ? 40c t a +125c 2 na input offset current i os 80 250 pa ? 40c t a +85c 350 pa ? 40c t a +125c 500 pa input voltage range ivr 0 3.5 v common - mode rejection ratio cmrr ada4522 -2 , v cm = 0 v to 3.5 v 135 155 db ada4522 -4 , v cm = 0 v to 3.5 v 130 145 db ? 40c t a +125c 130 db large signal voltage gain a vo r l = 10 k?, v o ut = 0.5 v to 4.5 v 125 145 db ? 40c t a +125c 125 db input resistance differential mode r indm 30 k? common mode r incm 100 g? input capacitance differential mode c indm 7 pf common mode c incm 35 pf output characteristics output voltage high v oh r l = 10 k? to v sy /2 4.97 4.98 v ? 40c t a +125c 4.95 v output voltage low v ol r l = 10 k? to v sy /2 20 30 mv ? 40c t a +125c 50 mv continuous output current i out dropout voltage = 1 v 14 ma short - circuit current source i sc+ 22 ma t a = 125c 15 ma short - circuit current sink i sc? 29 ma t a = 125c 19 ma closed - loop output impedance z out f = 1 mhz, a v = 1 4 ? power supply power supply rejection ratio psrr v sy = 4.5 v to 55 v 150 160 db ? 40c t a +125c 145 db supply current per amplifier i sy i out = 0 ma 830 900 a ? 40c t a +125c 950 a dynamic performance slew rate sr+ r l = 10 k?, c l = 50 pf, a v = 1 1.4 v/s sr? r l = 10 k?, c l = 50 pf, a v = 1 1.3 v/s gain bandwidth product gbp v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo = 100 2.7 mhz unity - gain crossover ugc v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo = 1 3 mhz ? 3 db closed - loop bandwidth f ? 3 db v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a v = 1 6.5 mhz phase margin m v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo = 1 64 degrees settling time to 0.1% t s v in = 1 v step, r l = 10 k?, c l = 50 pf, a v = 1 4 s channel separation cs v in = 1 v p - p, f = 10 khz, r l = 10 k?, c l = 50 pf 98 db
ada4522- 2/ada4522 - 4 data sheet rev. b | page 4 of 30 parameter symbol test conditions/comments min typ max unit emi rejection ratio of +in x emirr v in = 100 mv peak , f = 400 mhz 72 db v in = 100 mv peak , f = 900 mhz 80 db v in = 100 mv peak , f = 1800 mhz 83 db v in = 100 m peak , f = 2400 mhz 85 db noise performance total harmonic distortion + noise thd + n a v = 1, f = 1 khz, v in = 0.6 v rms b andwidth (b w ) = 80 khz 0.001 % bw = 500 khz 0.02 % peak -to - peak voltage noise e n p - p a v = 100, f = 0.1 hz to 10 hz 117 nv p -p voltage noise density e n a v = 100, f = 1 khz 5.8 nv/hz peak -to - peak current noise i n p - p a v = 100, f = 0.1 hz to 10 hz 16 pa p -p current noise density i n a v = 100, f = 1 khz 0.8 pa/hz electrical character istics 30 v operation v sy = 30 v, v cm = v sy / 2 v, t a = 25c, unless otherwise specified. table 3 . parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os v cm = v sy /2 1 5 v ? 40c t a +125c 7.2 v offset voltage drift v os /t ada4522 -2 4 22 nv/c ada4522 -4 5.3 25 nv/c input bias current i b 50 150 pa ? 40c t a +85c 500 pa ? 40c t a +125c 3 na input offset current i os 80 300 pa ? 40c t a +85c 400 pa ? 40c t a +125c 500 pa input voltage range ivr 0 28.5 v common - mode rejection ratio cmrr v cm = 0 v to 28.5 v 145 160 db ? 40c t a +125c 140 db large signal voltage gain a vo r l = 10 k?, v o ut = 0.5 v to 29.5 v 140 150 db ? 40c t a +125c 135 db input resistance differential mode r indm 30 k? common mode r incm 400 g? input capacitance differential mode c indm 7 pf common mode c incm 35 pf output characteristics output voltage high v oh r l = 10 k? to v sy /2 29.87 29.89 v ? 40c t a +125c 29.80 v output voltage low v ol r l = 10 k? to v sy /2 110 130 mv ? 40c t a +125c 200 mv continuous output current i out dropout voltage = 1 v 14 ma short - circuit current source i sc+ 21 ma t a = 125c 15 ma short - circuit current sink i sc? 33 ma t a = 125c 22 ma closed - loop output impedance z out f = 1 mhz, a v = 1 4 ?
data sheet ada4522- 2/ada4522 - 4 rev. b | page 5 of 30 parameter symbol test conditions/comments min typ max unit power supply power supply rejection ratio psrr v sy = 4.5 v to 55 v 150 160 db ? 40c t a +125c 145 db supply current per amplifier i sy i out = 0 ma 830 900 a ? 40c t a +125c 950 a dynamic performance slew rate sr+ r l = 10 k?, c l = 50 pf, a v = 1 1.8 v/s sr? r l = 10 k?, c l = 50 pf, a v = 1 0.9 v/s gain bandwidth product gbp v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo = 100 2.7 mhz unity - gain crossover ugc v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo =1 3 mhz ? 3 db closed - loop bandwidth f ? 3 db v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a v = 1 6.5 mhz phase margin m v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo = 1 64 degrees settling time t o 0.1% t s v in = 10 v step, r l = 10 k ?, c l = 50 pf, a v = 1 12 s settling time t o 0.01% t s v in = 10 v step, r l = 10 k ?, c l = 50 pf, a v = 1 14 s channel separation cs v in = 10 v p - p, f = 10 khz, r l = 10 k? , c l = 50 pf 98 db emi rejection ratio of +in x emirr v in = 100 mv peak , f = 400 mhz 72 db v in = 100 mv peak , f = 900 mhz 80 db v in = 100 mv peak , f = 1800 mhz 83 db v in = 100 mv peak , f = 2400 mhz 85 db noise performance total harmonic distortion + noise thd + n a v = 1, f = 1 khz, v in = 6 v rms bw = 80 khz 0.0005 % bw = 500 khz 0.004 % peak -to - peak voltage noise e n p - p a v = 100, f = 0.1 hz to 10 hz 117 nv p -p voltage noise density e n a v = 100, f = 1 khz 5.8 nv/hz peak -to - peak current noise i n p - p a v = 100, f = 0.1 hz to 10 hz 16 pa p -p current noise density i n a v = 100, f = 1 khz 0.8 pa/hz electrical character istics 55 v operation v sy = 55 v, v cm = v sy / 2 v, t a = 25c, unless otherwise specified. table 4 . parameter symbol test conditions/comments min typ max unit input characteristics offset voltage v os v cm = v sy /2 1.5 7 v ? 40c t a +125c 10 v offset voltage drift v os /t ada4522 -2 6 30 nv/c ada4522 -4 9 40 nv/c input bias current i b 50 150 pa ? 40c t a +85c 500 pa ? 40c t a +125c 4.5 na input offset current i os 80 300 pa ? 40c t a +85c 400 pa ada4522 -2 , ? 40c t a +125c 500 pa ada4522 -4 , ?40c t a +125c 550 pa input voltage range ivr 0 53.5 v common - mode rejection ratio cmrr v cm = 0 v to 53.5 v 140 144 db ? 40c t a +125c 135 db large signal voltage gain a vo r l = 10 k?, v o ut = 0.5 v to 54.5 v 135 137 db ? 40c t a +125c 125 db input resistance differential mode r indm 30 k? common mode r incm 1000 g?
ada4522- 2/ada4522 - 4 data sheet rev. b | page 6 of 30 parameter symbol test conditions/comments min typ max unit input capacitance differential mode c indm 7 pf common mode c incm 35 pf output characteristics output voltage high v oh r l = 10 k? to v sy /2 54.75 54.8 v ? 40c t a +125c 54.65 v output voltage low v ol r l = 10 k? to v sy /2 200 250 mv ? 40c t a +125c 350 mv continuous output current i out dropout voltage = 1 v 14 ma short - circuit current source i sc+ 21 ma t a = 125c 15 ma short - circuit current sink i sc? 32 ma t a = 125c 22 ma closed - loop output impedance z out f = 1 mhz, a v = 1 4 ? power supply power supply rejection ratio psrr v sy = 4.5 v to 55 v 150 160 db ? 40c t a +125c 145 db supply current per amplifier i sy i out = 0 ma 830 900 a ? 40c t a +125c 950 a dynamic performance slew rate sr+ r l = 10 k?, c l = 50 pf, a v = 1 1.7 v/s sr - r l = 10 k?, c l = 50 pf, a v = 1 0.8 v/s gain bandwidth product gbp v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo = 100 2.7 mhz unity - gain crossover ugc v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo = 1 3 mhz ? 3 db closed - loop bandwidth f ? 3 db v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a v = 1 6.5 mhz phase margin m v in = 10 mv p - p, r l = 10 k?, c l = 50 pf, a vo = 1 64 degrees settling time t o 0.1% t s v in = 10 v step, r l = 10 k ?, c l = 50 pf , a v = 1 12 s settling time t o 0.01% t s v in = 10 v step, r l = 10 k ?, c l = 50 pf, a v = 1 14 s channel separation cs v in = 10 v p - p, f = 10 khz, r l = 10 k?, c l = 50 pf 98 db emi rejection ratio of +in x emirr v in = 100 mv peak , f = 400 mhz 72 db v in = 100 mv peak , f = 900 mhz 80 db v in = 100 mv peak , f = 1800 mhz 83 db v in = 100 mv peak , f = 2400 mhz 85 db noise performance total harmonic distortion + noise thd + n a v = 1, f = 1 khz, v in = 10 v rms bw = 80 khz 0.0007 % bw = 500 khz 0.003 % peak -to - peak voltage noise e n p - p a v = 100, f = 0.1 hz to 10 hz 117 nv p -p voltage noise density e n a v = 100, f = 1 khz 5.8 nv/hz peak -to - peak current noise i n p - p a v = 100, f = 0.1 hz to 10 hz 16 pa p -p current noise density i n a v = 100, f = 1 khz 0.8 pa/hz
data sheet ada4522- 2/ada4522 - 4 rev. b | page 7 of 30 absolute maximum rat ings table 5 . parameter rating supply voltage 60 v input voltage (v?) ? 300 mv to (v+) + 300 mv input current 1 10 ma differential input voltage 5 v output short - circuit duration to ground indefinite temperature range storage ? 65 c to +150 c operating ? 40 c to +125 c junction ? 65 c to +150 c lead temperature (soldering, 60 sec) 300 c 1 the input pins have clamp diodes to the power supply pins. limit t he input current to 10 ma or less whenever input signals exceed the power supply rail by 0.3 v. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this s pecification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. thermal resistance ja is specified for the worst case conditio ns, that is, a device soldered i n a circuit board for surface - mount packages using a standard 4 - layer j edec board. table 6 . thermal resistance package type ja jc unit 8 - lead msop (rm-8) 1 9 4 38 c/w 8 - lead soic (r - 8) 1 22 4 1 c/w 14- lead tssop (ru - 14) 112 43 c/w 14- lead soic (r - 14) 115 36 c/w esd caution
ada4522- 2/ada4522 - 4 data sheet rev. b | page 8 of 30 pin configuration s and function descrip tions out a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 ADA4522-2 top view (not to scale) 13168-002 figure 3. ada4522 - 2 pin configuration table 7 . ada4522 - 2 pin function descriptions pin no. mnemonic description 1 out a output, channel a 2 ? in a inverting input, channel a 3 + in a non inverting input, channel a 4 v ? negative supply voltage 5 + in b non inverting input, channel b 6 ? in b inverting input, channel b 7 out b output, channel b 8 v + positive supply voltage 1 2 3 4 5 6 7 ?in a +in a v? out b ?in b +in b out a 14 13 12 1 1 10 9 8 ?in d +in d v+ out c ?in c +in c out d ada4522-4 t op view (not to scale) 13168-189 figure 4. ada4522 - 4 pin configuration table 8 . ada4522 - 4 pin function descriptions pin no. mnemoni c description 1 out a output, channel a 2 ? in a inverting input, channel a 3 +in a noninverting input, channel a 4 v? negative supply voltage 5 +in b noninverting input, channel b 6 ? in b inverting input, channel b 7 out b output, channel b 8 out c output, channel c 9 ? in c inverting input, channel c 10 +in c noninverting input, channel c 11 v + positive supply voltage 12 +in d noninverting input, channel d 13 ? in d inverting input, channel d 14 out d output, channel d
data sheet ada4522- 2/ada4522 - 4 rev. b | page 9 of 30 typical performance characteristics t a = 25 c, unless otherwise noted . 90 0 10 20 30 40 50 60 70 80 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 5 number of amplifiers v os (v) v sy = 2.5v v cm = v sy /2 600 channels mean = 0.10v std dev. = 0.59v 13168-003 figure 5 . input offset voltage distribution, v sy = 2.5 v 80 0 10 20 30 40 50 60 70 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 5 number of amplifiers v os (v) v sy = 15v v cm = v sy /2 600 channels mean = 0.31v std dev. = 0.62v 13168-004 figure 6 . input offset voltage distribution , v sy = 15 v 70 0 10 20 30 40 50 60 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 5 number of amplifiers v os (v) v sy = 27.5v v cm = v sy /2 600 channels mean = 0.69v std dev. = 0.81v 13168-005 figure 7 . input offset voltage distribution, v sy = 27.5 v 35 0 5 10 15 20 25 30 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 15 25 20 30 number of amplifiers tcv os (nv/c) v sy = 2.5v C40c t a +125c 160 channels mean = ?1.19nv/c std dev. = 1.82nv/c 13168-006 figure 8 . input offset voltage drift distribution, v sy = 2.5 v 35 0 5 10 15 20 25 30 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 15 25 20 30 number of amplifiers tcv os (nv/c) v sy = 15v C40c t a +125c 160 channels mean = ?2.48nv/c std dev. = 2.65nv/c 13168-007 figure 9 . input offset voltage drift distribution , v sy = 15 v 35 0 5 10 15 20 25 30 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 15 25 20 30 number of amplifiers tcv os (nv/c) v sy = 27.5v C40c t a +125c 160 channels mean = ?4.54nv/c std dev. = 4.01nv/c 13168-008 figure 10 . input offset voltage drift distribution , v sy = 27.5 v
ada4522- 2/ada4522 - 4 data sheet rev. b | page 10 of 30 5 ?5 ?3 1 ?1 3 0 1.0 3.0 2.0 3.5 v os (v) v cm (v) v sy = 5v 20 channels 13168-009 f igure 11 . input offset voltage (v os ) vs. common - mode voltage (v cm ), v sy = 5 v 5 ?5 ?3 1 ?1 3 0 5.0 25.0 15.0 10.0 20.0 28.5 v os (v) v cm (v) v sy = 30v 20 channels 13168-010 figure 12 . input offset voltage (v os ) vs. common - mode voltage (v cm ), v sy = 30 v 5 ?5 ?3 1 ?1 3 0 5.0 45.0 25.0 15.0 35.0 10.0 50.0 30.0 20.0 40.0 53.5 v os (v) v cm (v) v sy = 55v 20 channels 13168-0 1 1 figure 13 . input offset voltage (v os ) vs. common - mode voltage (v cm ), v sy = 55 v 2000 ?500 0 1000 500 1500 0 0.5 2.5 1.5 1.0 3.0 2.0 3.5 i b (pa) v cm (v) +125c +85c +25c ?40c v sy = 5v 13168-012 figure 14 . input bias current (i b ) vs. common - mode voltage (v cm ), v sy = 5 v 3000 ?500 0 2000 1000 1500 500 2500 0 5.0 25.0 15.0 10.0 20.0 28.5 i b (pa) v cm (v) +125c +85c +25c ?40c v sy = 30v 13168-013 figure 15 . input bias current (i b ) vs. common - mode voltage (v cm ), v sy = 30 v 5000 ?500 0 3500 1500 2500 500 4500 3000 1000 2000 4000 0 10.0 50.0 30.0 20.0 40.0 5.0 45.0 25.0 15.0 35.0 53.5 i b (pa) v cm (v) +125c +85c +25c ?40c v sy = 55v 13168-014 figure 16 . input bias current (i b ) vs. common - mode voltage (v cm ), v sy = 55 v
data sheet ada4522- 2/ada4522 - 4 rev. b | page 11 of 30 1600 ?400 ?200 1200 400 800 0 1000 200 600 1400 ?50 0 100 50 ?25 75 25 125 i b (pa) temperature (c) v sy = 2.5v v cm = v sy /2 i b + i b ? i os 13168-015 figure 17 . input bias current (i b ) vs. temperature, v sy = 2.5 v 2500 ?500 0 1500 500 1000 2000 ?50 0 100 50 ?25 75 25 125 i b (pa) temperature (c) v sy = 15v v cm = v sy /2 i b + i b ? i os 13168-017 figure 18 . input bias current (i b ) vs. temperature, v sy = 15 v v sy = 2.5v to 27.5v 100k 0.1 100 1 10 1k 10k 0.001 0.1 10 0.01 1 100 output voltage high (v oh ) to supply rail (mv) i load (ma) 13168-024 +125c +85c +25c ?40c figure 19 . output voltage high (v oh ) to supply rail vs. load current (i load ) 4000 ?1000 ?500 3000 1000 2000 0 2500 500 1500 3500 ?50 0 100 50 ?25 75 25 125 i b (pa) temperature (c) v sy = 27.5v v cm = v sy /2 i b + i b ? i os 13168-016 figure 20 . input bias current (i b ) vs. temperature, v sy = 27.5 v 1.0 0 0.4 0.2 0.6 0.8 0 5 10 15 20 25 30 35 40 45 50 55 60 i sy per amplifier (ma) v sy (v) +125c +85c +25c ?40c 13168-025 figure 21 . supply current (i sy ) per amplifier vs. supply voltage (v sy ) 100k 0.1 100 1 10 1k 10k 0.001 0.1 10 0.01 1 100 i load (ma) v sy = 2.5v to 27.5v 13168-027 +125c +85c +25c ?40c output voltage low (v ol ) to supply rail (mv) figure 22 . output voltage low (v ol ) to supply rail vs. load current (i load )
ada4522- 2/ada4522 - 4 data sheet rev. b | page 12 of 30 150 0 25 100 50 75 125 ?50 0 125 100 50 ?25 75 25 150 temperature (c) r l = 2k v sy = 2.5v r l = 10k 13168-018 output voltage high (v oh ) to supply rail (mv) figure 23 . output voltage high (v oh ) to supply rail vs. temperature, v sy = 2.5 v 200 0 25 100 50 75 125 150 175 ?50 0 125 100 50 ?25 75 25 150 temperature (c) r l = 10k v sy = 15v r l = 100k 13168-019 output voltage high (v oh ) to supply rail (mv) figure 24 . output voltage high (v oh ) to supply rail vs. temperature, v sy = 15 v 350 0 50 200 100 150 250 300 ?50 0 125 100 50 ?25 75 25 150 temperature (c) v sy = 27.5v r l = 100k r l = 10k 13168-020 output voltage high (v oh ) to supply rail (mv) figure 25 . output voltage high (v oh ) to supply rail vs. temperature, v sy = 27.5 v 150 0 25 100 50 75 125 ?50 0 125 100 50 ?25 75 25 150 temperature (c) v sy = 2.5v r l = 10k r l = 2k 13168-021 output voltage low (v ol ) to supply rail (mv) figure 26 . output voltage low (v ol ) to supply rail vs. temperature, v sy = 2.5 v 200 0 25 100 50 75 125 150 175 ?50 0 125 100 50 ?25 75 25 150 temperature (c) v sy = 15v r l = 100k r l = 10k 13168-022 output voltage low (v ol ) to supply rail (mv) figure 27 . output voltage low (v ol ) to supply rail vs. temperature, v sy = 15 v 350 0 50 200 100 150 250 300 ?50 0 125 100 50 ?25 75 25 150 temperature (c) v sy = 27.5v r l = 100k r l = 10k 13168-023 output voltage low (v ol ) to supply rail (mv) figure 28 . output voltage low (v ol ) to supply rail vs. temperature, v sy = 27.5 v
data sheet ada4522- 2/ada4522 - 4 rev. b | page 13 of 30 140 0 40 20 80 120 60 100 10 100 1k 10k 100k 1m 10m cmrr (db) frequency (hz) v sy = 2.5v to 27.5v 13168-030 figure 29 . cmrr vs. frequency 1k 0.001 0.01 1 100 0.1 10 100 1k 10k 100k 1m 10m 100m output impedance () frequency (hz) a v = 100 a v = 10 a v = 1 13168-031 v sy = 2.5v to 27.5v figure 30 . closed - loop output impedance vs. frequency 120 ?40 20 0 ?20 60 100 40 80 135 ?45 0 45 90 100 1k 10k 100k 1m 10m open-loop gain (db) phase margin (degrees) frequency (hz) c l = 50pf c l = 100pf c l = 50pf c l = 100pf 13168-026 phase gain v sy = 2.5v to 27.5v r l = 10k 140 ?20 0 40 20 80 120 60 100 100 1k 10k 100k 1m 10m 100m psrr (db) frequency (hz) psrr+ psrr? v sy = 2.5v to 27.5v 13168-032 figure 32 . psrr vs. frequency 0.840 0.805 0.815 0.810 0.825 0.835 0.820 0.830 ?50 ?25 0 25 50 75 100 125 150 i sy per amplifier (ma) temperature (c) 5v 30v 55v 13168-028 figure 33 . supply current (i sy ) per amplifier vs. temperature 13168-133 ?20 ?10 0 10 20 30 40 50 60 100 1k 10k 100k 1m 10m closed-loo p gain (db) frequenc y (hz) a v = 10 a v = 1 v sy = 2.5v t o 27.5v a v = 100 figure 34 . closed - loop gain vs. frequency
ada4522- 2/ada4522 - 4 data sheet rev. b | page 14 of 30 2.0 ?2.0 ?1.0 ?1.5 0 1.5 1.0 ?0.5 0.5 voltage (v) time (4s/div) v sy = 2.5v v in = 1.5v p-p a v = +1 r l = 10k c l = 100pf r s_in+ = 100 r s_in? = 100 13168-034 figure 35 . large signal transient response, v sy = 2.5 v 20 15 ?20 ?15 ?10 ?5 0 5 10 voltage (v) time (10s/div) v sy = 15v v in = 15v p-p a v = 1 r l = 10k c l = 100pf r s_in+ = 100 13168-035 figure 36 . large signal transient response, v sy = 15 v 30 ?30 ?20 ?10 0 10 20 voltage (v) time (10s/div) v sy = 27.5v v in = 50v p-p a v = 1 r l = 10k c l = 100pf r s_in+ = 100 r s_in? = 100 13168-036 figure 37 . large signal transient response, v sy = 27.5 v 0.08 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 voltage (v) time (400ns/div) v sy = 2.5v v in = 100mv p-p a v = 1 r l = 10k c l = 100pf 13168-037 figure 38 . small signal transient response, v sy = 2.5 v 0.08 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 voltage (v) time (400ns/div) v sy = 15v v in = 100mv p-p a v = 1 r l = 10k c l = 100pf 13168-038 figure 39 . small signal transient response, v sy = 15 v 0.08 ?0.08 ?0.06 ?0.04 ?0.02 0 0.02 0.04 0.06 voltage (v) time (400ns/div) v sy = 27.5v v in = 100mv p-p a v = 1 r l = 10k c l = 100pf 13168-039 figure 40 . small signal transient response, v sy = 27.5 v
data sheet ada4522- 2/ada4522 - 4 rev. b | page 15 of 30 50 45 40 35 30 25 20 15 10 5 0 10 100 1000 overshoot (%) load capacitance (pf) os+ v sy = 2.5v r l = 10k a v = 1 v in = 100mv p-p os? 13168-040 figure 41 . small signal overshoot vs. load capacitance, v sy = 2.5 v 50 45 40 35 30 25 20 15 10 5 0 10 100 1000 overshoot (%) load capacitance (pf) os+ v sy = 15v r l = 10k a v = 1 v in = 100mv p-p os? 13168-041 figure 42 . small signal overshoot vs. load capacitance, v sy = 15 v 50 45 40 35 30 25 20 15 10 5 0 10 100 1000 overshoot (%) load capacitance (pf) os+ v sy = 27.5v r l = 10k a v = 1 v in = 100mv p-p os? 13168-042 figure 43 . small signal overshoot vs. load capacitance, v sy = 27.5 v 0 ?140 ?120 ?100 ?80 ?60 ?40 ?20 0.01 1 100 0.1 10 channel separation (db) frequency (khz) v sy = 2.5v a v = ?10 r l = 10k v in = 0.5v p-p v in = 1v p-p v in = 2v p-p 13168-043 figure 44 . channel separation vs. frequency, v sy = 2.5 v 0 ?140 ?120 ?100 ?80 ?60 ?40 ?20 0.01 1 100 0.1 10 channel separation (db) frequency (khz) v sy = 15v a v = ?10 r l = 10k v in = 5v p-p v in = 10v p-p v in = 25v p-p 13168-044 figure 45 . channel separation vs. frequency, v sy = 15 v 0 ?140 ?120 ?100 ?80 ?60 ?40 ?20 0.01 1 100 0.1 10 channel separation (db) frequency (khz) v sy = 27.5v a v = ?10 r l = 10k v in = 10v p-p v in = 30v p-p v in = 50v p-p 13168-045 figure 46 . channel separation vs. frequency, v sy = 27.5 v
ada4522- 2/ada4522 - 4 data sheet rev. b | page 16 of 30 100 10 1 0.1 0.01 0.001 0.0001 0.001 1 0.1 0.01 thd + n (%) amplitude (v rms) v sy = 2.5v a v = 1 frequency = 1khz r l = 10k 80khz low-pass filter 500khz low-pass filter 13168-050 figure 47 . thd + n vs. amplitude, v sy = 2.5 v 100 10 1 0.1 0.01 0.001 0.0001 0.001 10 1 0.1 0.01 thd + n (%) amplitude (v rms) v sy = 15v a v = 1 frequency = 1khz r l = 10k 80khz low-pass filter 500khz low-pass filter 13168-051 figure 48 . thd + n vs. amplitude, v sy = 15 v 100 10 1 0.1 0.01 0.001 0.0001 0.001 10 1 0.1 0.01 thd + n (%) amplitude (v rms) v sy = 27.5v a v = 1 frequency = 1khz r l = 10k 80khz low-pass filter 500khz low-pass filter 13168-052 figure 49 . thd + n vs. amplitude, v sy = 27.5 v 1 0.1 0.01 0.001 0.0001 10 100k 10k 1k 100 thd + n (%) frequency (hz) v sy = 2.5v a v = 1 r l = 10k v in = 0.6v rms 80khz low-pass filter 500khz low-pass filter 13168-053 figure 50 . thd + n vs. frequency, v sy = 2.5 v 1 0.1 0.01 0.001 0.0001 10 100k 10k 1k 100 thd + n (%) frequency (hz) v sy = 15v a v = 1 r l = 10k v in = 6v rms 80khz low-pass filter 500khz low-pass filter 13168-054 figure 51 . thd + n vs. frequency, v sy = 15 v 1 0.1 0.01 0.001 0.0001 10 100k 10k 1k 100 thd + n (%) frequency (hz) v sy = 27.5v a v = 1 r l = 10k v in = 10v rms 80khz low-pass filter 500khz low-pass filter 13168-055 figure 52 . thd + n vs. frequency, v sy = 27.5 v
data sheet ada4522- 2/ada4522 - 4 rev. b | page 17 of 30 0.2 ?0.2 ?0.6 ?1.0 ?1.4 0 ?0.4 ?0.8 ?1.2 7 5 3 1 ?1 6 4 2 0 input voltage (v) output voltage (v) time (1s/div) v sy = 2.5v v in = 350mv p-p r l = 10k c l = 100pf a v = ?10 v in v out 13168-056 figure 53 . positive overload recovery, v sy = 2.5 v 2 ?2 ?3 ?10 ?14 0 ?4 ?8 ?12 35 25 15 5 ?5 30 20 10 0 input voltage (v) output voltage (v) time (4s/div) v sy = 15v v in = 2v p-p r l = 10k c l = 100pf a v = ?10 v in v out 13168-057 figure 54 . positive overload recovery, v sy = 15 v 2 ?2 ?3 ?10 ?14 0 ?4 ?8 ?12 70 50 30 10 ?10 60 40 20 0 input voltage (v) output voltage (v) time (10s/div) v sy = 27.5v v in = 4v p-p r l = 10k c l = 100pf a v = ?10 v in v out 13168-058 figure 55 . positive overload recovery, v sy = 27.5 v 0.4 0 ?0.4 ?0.8 ?1.2 0.2 ?0.2 ?0.6 ?1.0 5 3 1 ?1 ?3 4 2 0 ?2 input voltage (v) output voltage (v) time (1s/div) v sy = 2.5v v in = 350mv p-p r l = 10k c l = 100pf a v = ?10 v in v out 13168-059 figure 56 . negative overload recovery, v sy = 2.5 v 6 2 ?2 ?6 ?10 4 0 ?4 ?8 20 10 0 ?10 ?20 15 5 ?5 ?15 input voltage (v) output voltage (v) time (2s/div) v sy = 15v v in = 2v p-p r l = 10k c l = 100pf a v = ?10 v in v out 13168-060 figure 57 . negative overload recovery, v sy = 15 v 6 2 ?2 ?6 ?10 4 0 ?4 ?8 40 20 0 ?20 ?40 30 10 ?10 ?30 input voltage (v) output voltage (v) time (4s/div) v sy = 27.5v v in = 4v p-p r l = 10k c l = 100pf a v = ?10 v in v out 13168-061 figure 58 . negative overload recovery, v sy = 27.5 v
ada4522- 2/ada4522 - 4 data sheet rev. b | page 18 of 30 100 10 1 10 100k 100m 10k 10m 1k 100 1m voltage noise density (nv/hz) frequency (hz) v sy = 2.5v a v = 1 13168-062 figure 59 . voltage noise density vs. frequency , v sy = 2.5 v 100 10 1 10 100k 100m 10k 10m 1k 100 1m voltage noise density (nv/hz) frequency (hz) v sy = 15v a v = 1 13168-063 figure 60 . voltage noise density vs. frequency , v sy = 15 v 100 10 1 10 100k 100m 10k 10m 1k 100 1m voltage noise density (nv/hz) frequency (hz) v sy = 27.5v a v = 1 13168-064 figure 61 . voltage noise density vs. frequency , v sy = 27.5 v 100 10 1 0.1 10 100k 1m 10k 1k 100 voltage noise density (nv/hz) frequency (hz) a v = 100 5v 30v 55v 13168-065 figure 62 . voltage noise density vs. frequency , a v = 100 input referred voltage (nv) time (1s/div) v sy = 15v and 27.5v a v = 100 peak-to-peak noise = 117nv p-p 13168-066 ?100 ?75 ?50 ?25 0 25 50 75 100 figure 63 . 0.1 hz to 10 hz noise 10 1 0.1 10 100k 10k 1k 100 current noise density (pa/hz) frequency (hz) r s = 100k a v = 100 v sy = 2.5v v sy = 15v v sy = 27.5v 13168-067 figure 64 . current noise density vs. frequency
data sheet ada4522- 2/ada4522 - 4 rev. b | page 19 of 30 input voltage (1v/div) time (2s/div) v sy = 2.5v r l = 10k c l = 50pf dut a v = ?1 input output +10mv 0 ?10mv +1v 0 ?1v error band post gain = 10 13168-046 figure 65 . negative settling time to 0.1%, v sy = 2.5 v input voltage (5v/div) time (4s/div) v sy = 15v and 27.5v r l = 10k c l = 50pf dut a v = ?1 input output +50mv 0 ?50mv error band post gain = 10 13168-047 +5v 0 ?5v figure 66 . negative settling time to 0.1%, v sy = 15 v and 27.5 v 13168-166 0 10 20 30 40 50 60 100 1k 10k 100k 1m 10m output vo lt age swing (v p-p) frequenc y (hz) r l = 10k a v = ?1 v in = 26v v sy = 27.5v v in = 13.5v v sy = 15v v in = 1v v sy = 2.5v f igure 67 . output voltage swing vs. frequency input voltage (1v/div) time (2s/div) v sy = 2.5v r l = 10k c l = 50pf dut a v = ?1 input output +10mv 0 ?10mv error band post gain = 10 13168-048 +1v 0 ?1v figure 68 . positive settling time to 0.1%, v sy = 2.5 v input voltage (5v/div) time (4s/div) v sy = 15v and 27.5v r l = 10k c l = 50pf dut a v = ?1 input output +50mv 0 ?50mv error band post gain = 10 13168-049 +5v 0 ?5v figure 69 . positive settling time to 0.1%, v sy = 15 v and 27.5 v
ada4522- 2/ada4522 - 4 data sheet rev. b | page 20 of 30 applications informa tion the ada4522 - 2 / ada4522 - 4 are dual /quad , ultralow noise, high vo ltage, zero drift , rail - to - rail output opera tional amplifi er s. they feature a chopping technique that offers an ultr alow input offset voltage of 5 v and an inp ut offset voltage drift of 22 n v/ c max imum for the ada4522 - 2 and 25 n v/c maximum for the ada4522 - 4 . offset voltage errors due to common - mode voltag e swings and power supply va riations are also corrected by the cho pping tech nique, resulting in a s uperb typical cmrr figure of 160 db and a psrr figure of 16 0 db at a 30 v supply voltage. the ada4522 - 2 / ada4522 - 4 ha ve wide operating voltages from 2. 2 5 v (or 4. 5 v) to 27.5 v (or 55 v). the devices are single supply amplifier s , where their input voltage range includes the lower supply rail. they also offer low voltage noise density of 5.8 nv/hz (at f = 1 khz, a v = 100) a nd reduced 1/f noise component. these features are ideal for the amplification of low level signals in high precision applications. a few examples of such applications are weigh scale s , high precision current sensing, high voltage buffer s , signal conditioning for temperature sensors , among others. theory of o peration figure 70 shows the ada4522 - 2 / ada4522 - 4 architecture block diagram. it co nsists of an input emi filter and clamp circuitry, three gain stage s ( g m1 , g m2 , and g m3 ) , input and output choppin g network s (chop in and chop o ut ), a clock generator, offset and ripple correction loop circuitry, frequency compensation capacitors ( c1 , c2 , and c3) , and thermal shutdown circuitry . an emi filter and clamp circuit is implemented at the input front end to protect the internal circuitry against electrostatic discharge (esd) stresses and high voltage transient s. the ability of the amplifier to reject emi is explained in detail in the emi rejection ratio section. chop in and chop out are controlled b y a clock generator and operate at 4.8 mhz. the input baseband sig nal is initially modulated by chop in . next, chop out demodulates the input signal and modulates the m illivolt - level input offset voltage and 1/f noise of the input tran sconductanc e amplifier, g m1 , to the chopping frequency at 4.8 mhz. the chopping networks remove the low frequency errors , but in return, the networks introduce chopping artifact s at the chopping frequency . therefore , a offset and ripple correction loop, operating at 800 k hz, is used . this frequency is the switching frequency of the amplifier. this circuitry reduces chopping artifact s, allowin g the ada4522 - 2 / ada4522 - 4 to have a high chopping frequency with minimal artifact s. the thermal shutdown circuit shut s down the cir cuit when the die is overheated; this is explained further in the thermal shutdown section. g m1 g m2 g m3 emi filter and clamp thermal shutdown offset and ripple correction loop +in x ?in x chop in chop out c3 out c2 c1 4.8mhz clocks 800khz clocks clock generator 13168-068 figure 70 . ada4522 - 2/ ada4522 - 4 block diagram on - chip i n put emi filter and c lamp c ircuit figure 71 shows the input emi filter and clamp circuit. the ada4522 - 2 / ada4522 - 4 ha ve internal esd protection diodes (d1, d2, d3, and d4) that are connected between the inputs and each supply rail. these diodes protect the input transistors in the event of electros tatic discharge and are reverse biased during n ormal operation. this protection scheme allows voltages as high as approximately 300 mv beyond the rails to be applied at the input of either terminal without causing permanent damage. see table 5 in the absolute maximum ratings section for more information. the emi filter is composed of two 200 ? input series resistors (r s1 and r s2 ) , two common - mode capacitors (c cm1 and c cm2 ) , and a differential capacitor (c dm ) . th ese r c network s set the ? 3 db low - pass cutoff frequencies at 50 mhz for common - mode signals, and at 33 mhz for differential sign als. aft er the emi filter, back to back diodes (d 5 and d 6 ) are added to protect internal circuit devices from high voltage input transient s . each diode has about 1 v of forward turn on voltage. see the large signal transient response section for more information on the effect of high voltage i nput transient on the ada4522 - 2 / ada4522 - 4 . as specified in the absolute maximum r ating s table ( see table 5 ) , the maximum input differential voltage is limited to 5 v. if more than 5 v is applied, a continuous current larger than 10 ma flow s th rough one of the back to back diodes . this current c ompromise s long term reliability and can cause permanent damage to the device. v+ +in x ?in x v? r s1 200? r s2 200? d1 d2 d5 d6 d4 d3 c cm1 c dm c cm2 13168-069 figure 71 . input emi filter and clamp circuit
data sheet ADA4522-2/ada4522-4 rev. b | page 21 of 30 t hermal s hutdown the ada4522 -2 / ada4522 -4 ha ve internal thermal shutdown circuit ry for each channel of the amplifier. the thermal shutdow n circuitry prevents internal devices from being damaged by an overh eat condition in the die. overheat ing can occur due to a high ambient temperature, a high supply voltage, and/or high output currents. as specified in table 5 , take care to maintain the junction temperature below 150c. two conditions affect junction temperature (t j ): the total power dissipation of the device (p d ) and the ambient temperature surrounding the package (t a ). use t he following equation to estimate the a pproximate junction temperature: t j = p d ja + t a (1) where ja is the thermal resistance between the die and the ambient environment , as shown in table 6 . t he t otal p ower dissipation is the sum of quiescent power of the device and the power required to drive a load for all channels of an amplifier . the power dissipation per amplifier (p d_per_ amp ) for sourci ng a load is shown in equation 2 . p d_per_amp = ( v sy+ ? v sy ? ) i sy _per_amp + i out ( v sy+ ? v out ) (2) when sinking current, replace (v sy+ ? v out ) in equation 2 with (v out ? v sy ? ). also, take note to include the power dissipation of all channels of the amplifier when calculating the total power dissipation for the ada4522 -2 / ada4522 -4 . the therm al shutdown circuitry does not guarantee that the device is to be free of permanent damage if the junction temperature exceeds 150 c. however, the internal thermal shutdown function may help avoid permanent damage or reduce the degree of damage. each amplifier channel has thermal shutdown circuitry, composed of a temperature sensor with hysteresis. as soon as the junction temperature reaches 190c, the thermal shutdown circuitry shut s down the amplifier. note that either one of the two thermal shutdown circuitries are activated; this a ctivation disables the channel. when the amplifier is di sabled, the output becomes open state and the quiescent current of the channel decreases to 0.1 ma. when the junction temperature cools down to 160c, the thermal shutdown circuitry enables the amplifier and the quiescent current increases to its typical value. when overheat ing in the die is caused b y an undesirable excess amount of output current, the thermal shutdown circuit repeat s its function. the junction temperature keeps increasing until it reaches 190 c and one of the channels is disabled. then, the junction temperature cools down until it re aches 160 c, and the channel is enabled again. the process then repeats. input protection when either input of the ada4522 -2 / ada4522 -4 exceeds one of the supply rails by more than 300 mv, the esd diodes mentioned in the on- chip input emi filter and clamp circuit section become forward - biased and large amounts of current begin to flow through them. without current limiting, this excessive fault current causes permanent damage to the device. if the inputs ar e expected to be subject to overvoltage conditions, insert a resistor in series with each input to limit the input curren t to 10 ma maximum. however, consider the resistor thermal noise effect on the entire circuit. at 15 v supply voltage, the broa d band voltage noise of the ada4522 -2 / ada4522 -4 is approximately 7.3 nv/hz (at unity gain), and a 1 k? resistor has thermal noise of 4 nv/hz. adding a 1 k ? resistor increases the total noise to 8.3 nv/ hz . single -s upply and rail - to - rail output the ada4522 -2 / ada4522 -4 are single- supply a mplifier s, where t heir input v oltage r ange i ncludes t he l ower s upply rail. this feature is i deal fo r a ppl ications wh ere t he i nput common - mode v ol tage i s a t the lo wer su pply r ail, for example, g round sensin g. on the o ther ha nd, t he amplifier output is r ail to rail. figure 72 s hows the input and output waveforms of the ADA4522-2/ada4522-4 c onfigured as a unity -g ain buffer with a s upply v oltage o f 1 5 v. w i t h an i nput v oltage of 15 v , the low output voltage tracks t he input vo ltage, w hereas t he high output swing clamps /distorts when t he in put g oes o ut o f the input v oltag e range ( ? 15 v ivr + 13.5 v) . however, t he device does n ot ex hibit p hase reversal. 20 10 0 ?10 ?20 15 5 ?5 ?15 20 10 0 ?10 ?20 15 5 ?5 ?15 input voltage (v) output voltage (v) time (400s/div) v sy = 15v a v = 1 v in v out 13168-070 f igure 72 . no phase reversal
ada4522- 2/ada4522 - 4 data sheet rev. b | page 2 2 of 30 30 ?30 ?20 ?10 0 10 20 voltage (v) time (10s/div) v sy = 27.5v r s_in? 100? r s_in+ 100? v sy + v sy ? ADA4522-2/ ada4522-4 100pf 10k v out v in = 50v p-p 13168-071 figure 73 . large signal transient response example large signal transie nt response when the ada4522 - 2 / ada4522 - 4 are configured in a closed - loop configurati on with a large input transient ( for example, a step input voltage ), the internal back to back diodes may turn on. consider a case where the amplifier is in unity - gain configuration with a step input waveform. this case is shown i n figure 73. the non inverting input is driven by an input signal source and the inverting input is driven by the output of the amplifier. the maximum a mplifier output current depends on the input step function and the external source resistance at the input terminals of the amplifier. case 1 if the external source resistance is low ( for example, 100 ? in figure 73) or if the input step function is large , t he maximum amplifier output current is limited to the output short - circuit current as specified in the specif ications section . the maximum differential voltage between the input signal and the amplifier output is then limited by the maximum amplifier output curren t multiplied by the total input r esistance (internal and external ) and the turn on voltage of t he back to back diode (s ee figure 71 for the input emi filter and clamp circuit architecture ). when the noninverting input voltage changes with a step signal, the inverting input voltage (and, therefore, the output voltage) foll ows the change quickly until it reaches the maximum differential voltage between the input signal and amplifier output possible. the inverting input voltage then starts slewing with the slew rate specified in the speci fications section until it reaches its desired output. therefore, as seen in figure 73 , ther e are two distinctive sections of the rising and falling edge of the output waveform. with this test condition, the amount and duration of the input/output current is limited and , theref ore , does not damage the amplifier. case 2 if the external source resistance is high or if the input step function is small, the maximum output current is limited to the instantaneous difference between the input signal and amplifier output voltage (which is the change in the step function) divide d by the source resistance. this maximum output current is l ess than the amplifier output short - circuit current. the maximum differential voltage between the input signal and the amplifier output is then equal to the step function. the output voltage slew s until it reaches its desired output. therefore , i f desired, reduce the input current by adding a larger external resistor betwee n the signal source and the non inverting input. similarly, to reduce output current, add an external resistor to the feedback loop between the inverting input and output . th is large signal transient response issue is typically not a problem when the amplifier is configured in closed - loop gain , where the input signal source is usually much smaller and the gain and feedback resistors limit the current . back to back diodes are also imple mented in many other amplifiers; these amplifiers show similar slewing behavior. noise considerations 1/f n oise 1/f noise, also known as pink noise or flicker noise, is inherent in semiconductor devices and increases as frequency decreases. at a low frequency, 1/f noise is a major noise contributor and causes a significant output voltage offset when amplified by the noise gain of t he circuit. however, because t he low frequency 1/f noise appears as a slow varying offset to the ada4522 - 2 / ada4522 - 4 , it is effectively red uced by the chopping technique . this technique allows the ada4522 - 2 / ada4522 - 4 to have a much lower noise at dc and low frequency in comparison to standard low noise amplifiers that are susceptible to 1/f noise. figure 63 shows the 0.1 hz to 10 hz noise to be only 117 nv p - p of noise. source resistance the ada4522 - 2 / ada4522 - 4 are one of the lowest noise high voltage zero drift amplifiers wi th 5.8 nv/hz of voltage noise density at 1 khz (a v = 100). therefore, it is important to consider the input source resistance of choice to maintain a total low noise. the total input referred broadband noise (e n total) from any amplifier is primarily a function of three types of noise: input voltage noise, input current noise, and thermal (johnson) noise from the external resistors.
data sheet ada4522- 2/ada4522 - 4 rev. b | page 23 of 30 these uncorrelated noise sources can be summed up in a root sum squared (rss) manner by using the following equation: e n total = ( e n 2 + 4 ktr s + ( i n r s ) 2 ) 1/2 where: e n is the input voltage noise density of the amplifier (v/hz). k is the boltzmanns constant (1.38 10 ? 23 j/k). t is the temperature in kelvin (k). r s is the total input source resistance (?). i n is the input current noise density of the amplifier (a/hz). the total equivalent rms noise over a specific bandwidth is expressed as e n rms = e n total bw where bw is the bandwidth in hertz. this analysis is valid for broadband noise calculation up to a decade before the switching frequency . if the bandwidth of concern includes the switching frequency, mor e complicated calculations must be made to include the effect of the increase in noise at the switching frequency . with a low source resistance of r s < 1 k ?, the voltage noise of the amplifier dominates. as the source resistance increases, the thermal noise of r s dominates. as the source resistance further increases, where r s > 5 0 k?, the current noise becomes the main contributor of the total input noise. residual ripple as shown in figure 59 , figure 60 , and figure 61, th e ada4522 - 2 / ada4522 - 4 have a flat noise s pectrum density at lower frequencies and exhibit s spectrum density bumps and peaks at higher frequencies. the largest noise b ump is centered at 6 mhz; this is due to the decrease in the input gain at higher frequenc ies. this decrease is a typical p henomenon and can also be seen in o ther amplifiers. in addition to the noise b ump, a sharp peak due to the chopping networks is seen at 4.8 mhz. however, t his m agnitude is significantly reduced by the offset and ripple correction loop . its magnitud e may be different with different amplifier unit s or with different circuit ries around the amplifier . this peak can potentially be hidden by the noise b ump and, therefore , may not be detected . the offset and ripple correction loop, designed to reduce the 4.8 mhz switching artifact , also creates a noise b ump centered at 800 khz and a noise peak on top of this noise b u mp. although the magnitude of the b ump is mostly constant , the magnitude of the 800 k hz peak is different from unit to unit . some units may not exhibi t the 800 k hz noise peak , however, for other units , peaks occur at multiple integ r a ls of 800 khz, such as 1.6 mhz or 2.4 mhz . these noise peaks, albeit small in magnitude , can be significant when the amplifier has a closed - loop frequency that is higher than the chopping frequency. to suppress the noise spike to a desired level, either configure the amplifier in high gain configuration or apply a post filter at the output of the amplifier. figure 74 shows the voltage noise density of the ada4522 - 2 / ada4522 - 4 in different gain configurations. note that the highe r the gain, the lower the available bandwidth is. the earlier bandwidth roll - off effectively filters out the higher noise sp ectrum. 100 10 1 100 1k 10k 100k 1m 10m 100m voltage noise density (nv/hz) frequency (hz) v sy = 15v a v = 1 a v = 10 a v = 100 13168-072 figure 74 . voltage noise density with various gains figure 75 shows the voltage noise density of the ada4522 - 2 / ada4522 - 4 without and with post filters at different frequen - cies. the post filter serves to roll off the bandwidth before the switching frequency. in this example, the noise peak at 800 k hz is about 38 nv/ hz. with a post filter at 80 khz, the noise peak is reduced to 4.1 n v/ hz. with a post filter at 8 khz, the noise peak is lower than the noise floor a nd cannot be detected. 100 10 1 1k 10k 100k 1m 10m 100m voltage noise density (nv/hz) frequency (hz) a v = 1 a v = 1 (post filter at 80khz) a v = 1 (post filter at 8khz) 13168-073 figure 75 . voltage noise density with post filters
ada4522- 2/ada4522 - 4 data sheet rev. b | page 24 of 30 current noise density figure 76 shows the current noise density of the ada4522 - 2 / ada4522 - 4 at unity gain . at 1 k hz , current noise density is about 1.3 pa/ hz. current noise density is determined by measuring the voltage noise due to current no ise flowing through a resistor . due to the low current noise density of the amplifier , th e voltage noise is usually measured with a high value resistor; in this case, a 100 k? source resistor is used. however, t he source resistor interacts with the input capaci - tance of the amplifier and board, causing bandwidth to roll off. note that figure 76 shows the current noise density rolling of f much earlier than the unity - gai n bandwidth; this is expected. 10 1 0.1 10 100 1k 10k 100k current noise density (pa/hz) frequency (hz) v sy = 2.5v v sy = 15v v sy = 27.5v r s = 100k a v = 1 13168-074 figure 76 . current noise density at gain = 1 emi rejection ratio circuit performance is often adversely affected by high frequency emi . when the signal strength is low and transmission lines are long, an op amp must accurately amplify the input signals. how - ever, all op amp pins the noninverting input, inverting input, positive supply, negative supply, and output pins are susceptible to emi signals. these high frequency signals are coupled into an op amp by various means, such as conduction, near fie ld radiation, o r far field radi ation. for example , wires and printed circuit board ( pcb ) traces can act as antennas and pick up high frequency emi signals. amplifiers do not amplify emi or rf signals due to their relatively low bandwidth. however, due to t he nonlinearities of the input devices, op amps can rectify these out of band signals. when these high frequency signals are rectified, they appear as a dc offset at the output. the ad a4522 - 2 / ada4522 - 4 ha ve integrated emi filters at their input stage. to describe the ability of the ada4522 - 2 / ada4522 - 4 to perform as intended in the presence of electromagnetic ene rgy, the electromagnetic interference rejection ratio (emirr) of the noninverting pin is specified in table 2 , table 3 , and table 4 of the specifications section. a mathematical method of mea suring emirr is defined as follows: emirr = 20log ( v in_peak / v os ) 100 50 90 40 80 30 70 20 60 10 0 10m 100m 1g 10g emirr (db) frequency (hz) 55v 30v 5v v in = 100mv p-p 13168-075 figure 77 . emirr vs. frequency capacitive load stab ility the ada4522 - 2 / ada4522 - 4 can safely drive capacitive loads of up to 250 pf in any configuration. as with most amplifiers, driving larger capacitive loads than specified may cause excessive overshoot and ringing, or even oscillation. a h eavy capacitive load reduces phase margin and causes the amplifier frequency response to peak. peaking corresponds to over - shooting or ringing in the time domain. therefore, it is rec ommended that external co mpensa tion be used if the ada4522 - 2 / ada4522 - 4 must drive a load exceeding 250 pf. this compensation is particularly important in the unity - gain configuration, which is the worst case for stability. a quick and easy way to stabilize the op amp for capacitive load drive is by adding a series resistor, r iso , between the amplifier output terminal and the load capacitance, as shown in figure 78. r iso isolates the amplifier output and feedback network from the capacitive load. however, with this compensation scheme, the output impedance as seen by the load increases, and this reduces gain accuracy. 1/2 ?v s y v in +v s y v out c l ADA4522-2/ ada4522-4 r iso 13168-076 figure 78 . stability compensation with isolating resistor, r iso
data sheet ada4522- 2/ada4522 - 4 rev. b | page 25 of 30 figure 79 shows the effect on overshoot with different values of r iso . 60 25 50 55 45 20 40 15 35 10 30 5 0 10 100 1k overshoot (%) load capacitance (pf) v sy = 15v r l = 10k a v = 1 v in = 100mv p-p os+ (r iso = 0) os? (r iso = 0) os+ (r iso = 25) os? (r iso = 25) os+ (r iso = 50) os? (r iso = 50) 13168-077 figure 79 . small signal overshoot vs. load capacitance with various output isolating resistor s single - supply instrumentati on amplifier the extremely low offset voltage and drift, high open - loop gain, high common - mode rejection, and high power supply rejection of the ada4522 - 2 / ada4522 - 4 make them excellent op amp choice s as a discrete, single - supply instrumentation amplifier s. figure 80 shows the classic 3 - op - amp instrumentation amplifier using the ada4522 - 2 / ada4522 - 4 . the key to high cmr for the instrumen tation amplifier are resistors that are well matched for both the resistive ratio and relative drift. fo r true difference amplifica tion, matching of the resistor ratio is very important, where r5/r2 = r6/r4. the resistor s are important in determin - ing the performance over manufacturing tolerances, time, and temperature. assuming a perfect unit y - gain differe nce amplifier with infinite common - mode rejection, a 1% tolerance resistor matching results in only 34 db of common - mode rejection. therefore, at least 0.01% or better resistors are recommended. v in1 v in2 a1 a3 a2 r g1 r g2 r1 r3 r2 r4 r5 v out r6 r g 1 = r g 2 , r1 = r 3 , r 2 = r 4 , r 5 = r 6 v o u t = ( v i n 2 ? v i n 1 ) ( 1 + r 1 / r g 1 ) ( r 5/ r 2 ) 13168-078 figure 80 . discrete 3 - op amp instrumentation amplifier to build a discrete instrumentation amplifier with external resistors without compromising on noise, pay close attention to the resistor values chosen. r g1 and r g2 each have thermal noise that is amplified by the total noise gain of the instrumentation amplifier and, therefore, must be chosen sufficiently low to reduce thermal noise contribution at the output while still providing an accurate measurement. table 9 shows the external resistors noise contribution referred to the output (rto). table 9 . thermal noise contribution example resistor value ( k ?) resistor thermal noise (nv/hz) thermal noise rto (nv/hz) r g1 0.4 2.57 128.30 r g2 0.4 2.57 128.30 r1 10 12.83 25.66 r2 10 12.83 25.66 r3 10 12.83 25.66 r4 10 12.83 25.66 r5 20 18.14 18.14 r6 20 18.14 18.14 note that a1 and a2 have a high gain of 1 + r1/r g1 . therefore, use a high precision, low offset voltage and low noise amplifier for a1 and a2, such as the ada4522 - 2 / ada4522 - 4 . on the other hand, a3 operates at a much lower gain and has a different set of op amp requirements. its input noise, referred to the overall instrumentation amplifier input, is divided by the first stage gain and is not as important. note that the input offset voltage and the input voltage noise of the amplifiers are also amplified by the overall noise gain. any unused channel of the ada4522 - 2 / ada4522 - 4 must be configured in unity gain with the input common - mode voltage tied to the midpoint of the power supplies . understanding how noise impacts a dis crete instrumentation amplifier or a difference amplifier ( the second stage of a 3 - op - amp instrumentation amplifier) is important, because they are commonly used in many different applications. the load cell/strain gage sensor signal conditioning section and the precision low - side current shunt sensor section show the ada4522 - 2 / ada4522 - 4 used as a discrete instrumentation or difference amplifier in an application.
ada4522- 2/ada4522 - 4 data sheet rev. b | page 26 of 30 load cell/ strain g a ge sensor signal conditioning u sing the ada4522 - 2 the ada4522 - 2 , with its ultralow offset, drift , and noise , is well suited to signal condition low level sensor output with high gain and accuracy . a weigh scale/ load cell is an example of an appli - cation with such requirements . figure 81 shows a config uration for a single supply, precision , weigh scale measurement system. the ada4522 - 2 is used at the front end for amplificati on of the low level signal from the load cell. current flowing through a pcb trace produces an ir voltag e drop; with longer traces, this voltage drop can be several millivolts or more, i ntroducing a considerable error. a 1 inch long, 0.005 inch wide trace of 1 oz coppe r has a resistance of approximately 100 m ? at room temperature. with a load current of 10 ma, the resistance can introduce a 1 mv error. therefore, a 6 - wire load cell is used in the circuit . it has two sense pins, in addition to excitation, ground , and two output connections. the sense pins are connected to the high side (excitation pin) and low side (ground pin) of the wheatstone bridge. the voltage across the bridge can then be accurately measured regardless of voltage drop due to wire resistance. the two sense pins are also connected to the analog - to - digital converter ( adc ) reference inputs for a ratiometric configura - tion that is immune to low frequency changes in the power supply excitation voltage. the ada4522 - 2 is configured as the first stage of a 3 - op - amp instrumentation amplifier. i t amplifies the low level amplitude signal from the load cell by a factor of 1 + 2r1/r g . capacitors c1 and c2 are placed in the feedback l oops of the amplifiers and inte rac t with r1 and r2 to perform low - pass filtering. this filtering limits the amount of noise entering the - adc. in addition, c3, c4, c5, r3 , and r4 provide further common - mode and differential mode filtering to reduce nois e and unwanted signals. out+ sense? sense+ out? v exc 1/2 v+ r1 11.3k? c1 3.3f 1/2 ADA4522-2 ADA4522-2 r2 11.3k? c2 3.3f r g 60.4? r3 1k? r4 1k? c4 1f c5 10f c3 1f ain+ refin(?) refin(+) dout/ rdy din ain? gnd v dd +5v ad7791 100pf 1f 100pf sclk cs load cell 13168-079 figure 81 . precision weigh scale measurement system
data sheet ada4522- 2/ada4522 - 4 rev. b | page 27 of 30 precision low - side current shunt s ensor many applications require the sensing of signals near the positive or negative rails. current shunt sensors are one such application and are mostly used for feedback control systems. they are also used in a variety of other applications, including power metering, battery fuel gauging , and feedback controls in industrial application s . in such application s , it is desirable to use a shunt with very low resistance to minimize series voltage drop. this c onfiguration not only minimizes wasted power, but also allows the measurement of high cu rrents while saving power. a typical shunt may be 100 m. at a measured current of 1 a, the voltage produced from the shunt is 100 mv, and the amplifier error sources are not critical. however, at low measured current in the 1 ma range, the 100 v generated across the shunt demands a very low offset voltage and drift amplifier to maintain absolute accuracy. the unique attributes of a zero drift amplifier pr ovide a solution. figure 82 shows a low - side current sen sing circuit using the ada4522 - 2 / ada4522 - 4 . the ada4522 - 2 / ada4522 - 4 are configured as difference amplifier s with a gain of 1000. although the ada4522 - 2 / ada4522 - 4 ha ve high common - mode rejection, the cmr of the system is limited by the external resistors. therefore, as mentioned in the single - supply instrumentation amplifier section, the key to high cm r for the system is resistors that are well matched from both the resistive ratio and relative drift, where r1/r2 = r3/r4. any unused channel of the ada4522 - 2 / ada4522 - 4 must be configured in unity gain with the input commo n - mode voltage tied to the midpoint of the power supplies. r2 100k? v sy v sy v out * * v o u t = am p l i f i e r g ai n v o l t a g e a c r o s s r s = 1 00 0 r s i = 1 0 0 i r l r s 0.1? r1 100? i ADA4522-2/ ada4522-4 r4 100k? r3 100? i 1/2 13168-080 figure 82 . low - side current sensing printed circuit boar d layout the ada4522 - 2 / ada4522 - 4 are a high precision device with ultralow offset voltage and noise. therefore, take care in the design of the pcb layout to achieve op timum performance of the ada4522 - 2 / ada4522 - 4 at the board level. to avoid leakage currents, keep the surface of the board clean and free of moisture. properly bypassing the power supplies and keeping the supply traces short minimizes power supply disturbances caused by output current variation. connect bypass capacitors as close as possible to the device supply pins. stray capacitances are a concern at the outputs and the inputs of the amplifier. it is recommended that signal traces be kept at a distance of at least 5 mm from supply lines to minimize coupling. a potential source of offset error is the seebeck voltage on the circuit board. the seebeck v oltage occurs at the junction of two dissimilar metals and is a function of the temperature of the junction. the most common metallic junction s on a circuit board are solder to board trace s and solder to component lead s . fig ure 83 shows a cross section of a surface - mount component soldered to a pcb. a variation in temperature across the board (where t a1 t a2 ) causes a mismatch in the seebeck voltages a t the solder joints , thereby resulting in thermal voltage errors that degrade the performance of the ultral ow offset voltage of the ada4522 - 2 / ada4522 - 4 . solder + + + + component lead copper trace v sc1 v ts1 t a1 surface-mount component pc board t a2 v sc2 v ts2 if t a1 t a2 , then v ts1 + v sc1 v ts2 + v sc2 13168-081 fig ure 83 . mismatch in seebeck voltages causes seebeck voltage error in figure 83 , v sc 1 and v sc2 are the seebeck voltage s due to solder t o component at j unction 1 and junction 2, respectively. v ts 1 and v ts2 are the seebeck voltage s due to solder to trace at j unction 1 and j unction 2 . t a1 and t a2 are the temperature s of j unction 1 and j unction 2 , respectively. to minimize these thermocouple effects, orient resistors so that heat sources warm both ends equally. where possible, it is recommende d that the input signal pa ths contain matching numbers and types of components to match the number and type of thermocouple junctions . for example, dummy components, such as zero value resistors, can be used to match the thermo - electric error source (real r esistors in the opposite input path). place ma tching components in close p roximity and orient them in the same manner to ensure equal seebeck voltages, thus cancelling thermal errors. additionally, use leads that are of equal length to keep thermal conduction in equilibrium. keep heat sources on the pc b as far away from amplifier input circuitry as is practical. it is highly recommended to use a ground plane. a ground plane helps distribute heat t hroughout the board, maintain a constant temperatu re across the board, and reduce emi noise pick up.
ada4522- 2/ada4522 - 4 data sheet rev. b | page 28 of 30 comp arator operation an op amp is designed to operate in a closed - loop configuration with feedback from its output to its inverting input. in contrast to op amps, comparators are designed to operate in an open - loop configuration and to drive logic circuits. al though op a mps are different from comparators, occasionally an unused section of a dual op amp is used as a comparator to save board space and cost; however, this is not recommended for the ada4522 - 2 / ada4522 - 4 . figure 84 and figure 85 show the ada4522 - 2 / ada4522 - 4 configured as a com p arator, with 10 k ? resistors in series with the input pins. any unused channels are configured as buffers with the input voltage ke pt at the midpoint of the power supplies. the ada4522 - 2 / ada4522 - 4 ha ve input devices that are protected from large differential input voltages by diode d5 and diode d6 , as shown in figure 71. these diodes consist of substrate pnp bipolar transistors, and conduct whenever the differenti al input voltage exceeds approximately 600 mv ; how ever, these diodes also allow a current path from the input to the lower supply rail, resulting in an increase in the total supply current of the system. b oth comparator configurations yield the same result. at 30 v of power supply, i sy + remains at 1.55 ma per dual amplifier, but i sy ? increases close to 2 m a in magni tude per dual amplifier. 1/2 ADA4522-2/ ada4522-4 a1 10k? 10k? i sy + +v sy v out ?v sy i sy ? a2 13168-082 figure 84 . comparator configuration a 1/2 a1 10k? 10k? i sy + +v sy v out ?v sy i sy ? a2 ADA4522-2/ ada4522-4 13168-083 figure 85 . comparator configuration b 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 6 12 18 24 30 4 10 16 22 28 2 8 14 20 26 i sy per dual amplifier (ma) v sy (v) i sy + i sy ? 13168-084 figure 86 . supply current (i sy ) per dual amplifier vs. supply voltage (v sy ) ( ada4522 - 2/ ada4522 - 4 as a comparator) n ote that 10 k ? resistors are used in series with the input of the op amp. if smaller resistor values are used, the supply current of the system increases muc h more. for more deta ils on op amps as comparators, se e the an - 849 application note , using op amps as comparators .
data sheet ada4522- 2/ada4522 - 4 rev. b | page 29 of 30 outline dimensions compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 10-07-2009-b figure 87 . 8 - lead mini small outline package [msop] (rm - 8) dimensions shown in millimeters c o n t r o l l i n g d i m e n s i o n s a r e i n m i l l i m e t e r s ; i n c h d i m e n s i o n s ( i n p a r e n t h e s e s ) a r e r o u n d e d - o f f m i l l i m e t e r e q u i v a l e n t s f o r r e f e r e n c e o n l y a n d a r e n o t a p p r o p r i a t e f o r u s e i n d e s i g n . c o m p l i a n t t o j e d e c s t a n d a r d s m s - 0 1 2 - a a 0 1 2 4 0 7 - a 0 . 2 5 ( 0 . 0 0 9 8 ) 0 . 1 7 ( 0 . 0 0 6 7 ) 1 . 2 7 ( 0 . 0 5 0 0 ) 0 . 4 0 ( 0 . 0 1 5 7 ) 0 . 5 0 ( 0 . 0 1 9 6 ) 0 . 2 5 ( 0 . 0 0 9 9 ) 4 5 8 0 1 . 7 5 ( 0 . 0 6 8 8 ) 1 . 3 5 ( 0 . 0 5 3 2 ) s e a t i n g p l a n e 0 . 2 5 ( 0 . 0 0 9 8 ) 0 . 1 0 ( 0 . 0 0 4 0 ) 4 1 8 5 5 . 0 0 ( 0 . 1 9 6 8 ) 4 . 8 0 ( 0 . 1 8 9 0 ) 4 . 0 0 ( 0 . 1 5 7 4 ) 3 . 8 0 ( 0 . 1 4 9 7 ) 1 . 2 7 ( 0 . 0 5 0 0 ) b s c 6 . 2 0 ( 0 . 2 4 4 1 ) 5 . 8 0 ( 0 . 2 2 8 4 ) 0 . 5 1 ( 0 . 0 2 0 1 ) 0 . 3 1 ( 0 . 0 1 2 2 ) c o p l a n a r i t y 0 . 1 0 figure 88 . 8 - lead small outline package [soic _n] narrow body (r - 8) dimensions shown in millimeters and (inches)
ada4522- 2/ada4522 - 4 data sheet rev. b | page 30 of 30 controlling dimensions are in millimeters; inch dimensions (in p arentheses) are rounded-off millimeter equi v alents for reference on l y and are not appropri a te for use in design. compliant t o jedec s t andards ms-012-ab 060606- a 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc se a ting plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarit y 0.10 8 0 45 figure 89 . 14 - lead small outline package [soic_n] narrow body (r - 14) dimensions shown in millimeters and (inches) compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 sea ting plane figure 90 . 14 - lead thin shrink small outline package [tssop] (ru - 14) dimensions shown in millimeters and (inches) ordering guide model 1 temperature range package description package option branding ada4522 - 2 armz ? 40 c to +125 c 8 - lead mini small outline package [msop] rm - 8 a39 ada4522 - 2 armz - r7 ? 40 c to +125 c 8 - lead mini small outline package [msop] rm - 8 a39 ada4522 - 2 armz - rl ? 40 c to +125 c 8 - lead mini small outline package [msop] rm - 8 a39 ada4522 - 2 arz ? 40 c to +125 c 8 - lead small outline package [soic_n] r - 8 ada4522 - 2 arz - r7 ? 40 c to +125 c 8 - lead small outline package [soic_n] r - 8 ada4522 - 2 arz - rl ? 40 c to +125 c 8 - lead small outline package [soic_n] r - 8 ada4522 - 4aruz ? 40 c to +125 c 14- lead thin shrink small outline package [tssop] ru - 14 ada4522 - 4aruz - r7 ? 40 c to +125 c 14 - lead thin shrink small outline package [tssop] ru - 14 ada4522 - 4aruz - rl ? 40 c to +125 c 14- lead thin shrink small outline package [tssop] ru - 14 ada4522 - 4arz ? 40 c to +125 c 14- lead standard small outline package [soic_n] r - 14 ada4522 - 4arz - r7 ? 40 c to +125 c 14- lead standard small outline package [soic_n] r - 14 ada4522 - 4arz - rl ? 40 c to +125 c 14- lead standard small outline package [soic_n] r - 14 1 z = rohs compliant part. ? 2015 C 2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d13168 - 0- 1/16(b)

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